Hit the NewAE Webstore to purchase it!
The OpenADC platform is an open-hardware and open-software solution for your digitizing needs. Designed to fit a variety of FPGA development boards, it can significantly reduce the cost of experimenting with side-channel analysis, software defined radio (SDR), and lots more! See full details on the OpenADC Project at Assembla.
The design features:
- High speed (105 MSPS) ADC, for reduced cost can mount lower-speed units of same footprint
- LNA with computer-controlled gain, ranges from -10dB to 55dB (at 55dB gain full-scale input = 800µV P-P). Analog BW is ~50 MHz, although remains usable up to 200-300 MHz if signal is pure, since you can increase gain to compensate for roll-off (see docs for details)
- External clock input for synchronizing to specific clock source - idea for sampling based on externally locked clock
- Adjustable phase shift on sampling point to shift when samples occur based on external clock
- Transformer-coupled input for maximum analog bandwidth (>500MHz, but note SFDR of ADC is only ~300 MHz)
- Mounts to Avnet Spartan-6 LX9 Microboard, but with minimal modifications (e.g.: cutting pins + adding a wire) can fit to almost any FPGA board with 30 or 40-pin dual-row header, see OpenADC Wiki
- Open source hardware + software
Download the Datasheet
FPGA TargetsCombined with a FPGA, it makes a powerful capture tool. Originally designed for the $90 Spartan 6 LX9 Microboard, it can be used with almost any other FPGA board too.
For full details + source head over to The OpenADC Project on Assembla
Example CodeAgain see all the examples on the The OpenADC Project on Assembla . Current SW/HW is provided to give you examples of:
- Capturing from ADC to internal FIFO (using BRAM of FPGA), then downloading to computer
- Capturing from ADC to DDR memory, then downloading to computer
- Controlling a board & synchronizing capture to that board (for side-channel analysis)